Turning to optical I/O to open up computing pinch points

Getting data in and out of chips used for modern computing has become a key challenge for designers.

Hugo Saleh

A chip may talk to a neighbouring device in the same platform or to a chip across the data centre.

The sheer quantity of data and the reaches involved - tens or hundreds of meters - is why the industry is turning to optical for a chip’s input-output (I/O).

It is this technology transition that excites Ayar Labs.

The US start-up showcased its latest TeraPHY optical I/O chiplet operating at 1 terabit-per-second (Tbps) during the OFC virtual conference and exhibition held in June.

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Intel details its 800-gigabit DR8 optical module

The company earmarks 2023 for its first co-packaged optics product

Intel is sampling an 800-gigabit DR8 in an OSFP pluggable optical module, as announced at the recent OFC virtual conference and show.

Robert Blum“It is the first time we have done a pluggable module with 100-gigabit electrical serdes [serialisers/ deserialisers],” says Robert Blum, Intel’s senior director, marketing and new business. “The transition for the industry to 100-gigabit serdes is a big step.”

The 800-gigabit DR8 module has eight electrical 100-gigabit interfaces and eight single-mode 100-gigabit optical channels in each transmission direction.

The attraction of the single-module DR8 design, says Blum, is that it effectively comprises two 400-gigabit DR4 modules. “The optical interface allows you the flexibility that you can break it out into 400-gigabit DR4,” says Blum. “You can also do single 100-gigabit breakouts or you can do 800-gigabit-to-800-gigabit traffic.”

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Ayar Labs’ TeraPhy chiplet nears volume production

Moving data between processing nodes - whether servers in a data centre or specialised computing nodes used for supercomputing and artificial intelligence (AI) - is becoming a performance bottleneck.

Workloads continue to grow yet networking isn’t keeping pace with processing hardware, resulting in the inefficient use of costly hardware.

Networking also accounts for an increasing proportion of the overall power consumed by such computing systems.

These trends explain the increasing interest in placing optics alongside chips and co-packaging the two to boost input-output (I/O) capacity and reach.

At the ECOC 2020 exhibition and conference held virtually, start-up Ayar Labs showcased its first working TeraPHY, an optical I/O chiplet, manufactured using GlobalFoundries’ 45nm silicon-photonics process.

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CW-WDM MSA charts a parallel path for optics

Artificial intelligence (AI) and machine learning have become an integral part of the businesses of the webscale players.

The mega data centre players apply machine learning to the treasure trove of data collected from users to improve services and target advertising.

They can also use their data centres to offer cloud-based AI services.

Training neural networks with data sets is so intensive that it is driving new processor and networking requirements.

It is also impacting optics. Optical interfaces will need to become faster to cope with the amount of data, and that means interfaces with more parallel channels.

Anticipating these trends, a group of companies has formed the Continuous-Wave Wavelength Division Multiplexing (CW-WDM) multi-source agreement (MSA).

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Companies gear up to make 800 Gig modules a reality

Nine companies have established a multi-source agreement (MSA) to develop optical specifications for 800-gigabit pluggable modules.

Maxim Kuschnerov

The MSA has been created to address the continual demand for more networking capacity in the data centre, a need that is doubling roughly every two years. The largest switch chips deployed have a 12.8 terabit-per-second (Tbps) switching capacity while 25.6-terabit and 51-terabit devices are in development. 

“The MSA members believe that for 25.6Tbps and 51.2Tbps switching silicon, 800-gigabit interconnects are required to deliver the required footprint and density,” says Maxim Kuschnerov, a spokesperson for the 800G Pluggable MSA.

A 1-rack-unit (1RU) 25.6-terabit switch platform will use 32 such 800-gigabit modules while a 51.2-terabit 2RU platform will require 64.

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Ayar Labs and Intel add optical input-output to an FPGA

Start-up Ayar Labs, working with Intel, has interfaced its TeraPHY optical chiplet to the chip giant’s Stratix10 FPGA.

Hugo SalehIntel has teamed with several partners in addition to Ayar Labs for its FPGA-based silicon-in-package design, part of the US Defense Advanced Research Projects Agency’s (DARPA) project.  

Ayar Labs used the Hot Chips conference, held in Palo Alto, California in August, to detail its first TeraPHY chiplet product and its interface to the high-end FPGA.  

Origins

Ayar Labs was established to commercialise research that originated at MIT. The MIT team worked on integrating both photonics and electronics on a single die without changing the CMOS process.

The start-up has developed such building-block optical components in CMOS as a vertical coupler grating and a micro-ring resonator for modulation, while the electronic circuitry can be used to control and stabilise the ring resonator’s operation.  

Ayar Labs has also developed an external laser source that provides an external light source that can power up to 256 optical channels, each operating at either 16 to 32 gigabits-per-second (Gbps).

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Ayar Labs prepares for the era of co-packaged optics

The first of two articles on co-packaged optics.

Part 1: Ayar Labs

Ayar Labs is readying its co-packaged optics technology for scaled production in the second half of 2020. So says CEO Charlie Wuischpard who joined the start-up in late 2018 after it secured $24 million in funding to bring its products to market.

Co-packaged optics refers to the intimate coupling of optics with an ASIC in one package. Such tightly-coupled optics promises to overcome the growing system challenges associated with linking an ASIC’s high-speed signals to pluggable optics residing on a platform’s faceplate.

Charlie Wuischpard Wuischpard joined Ayar Labs from Intel where he led the supercomputing segment within the company’s data centre group. Wuischpard also led Intel’s disaggregated rack initiative.

“In both these, silicon photonics plays a huge role in enabling future architectures and future designs,” he says.

Ayar Labs raised its funding after demonstrating successfully its optical designs: a silicon-photonics optical chiplet, dubbed Teraphy, and its Supernova external laser source. 

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