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Thursday, March 8, 2012 at 6:37PM Feature: Beyond 100G - Part 4
The latest coherent ASICs from Ciena and Alcatel-Lucent coupled with announcements from Cisco and Huawei highlight where the industry is heading with regard high-speed optical transport. But the announcements also raise questions too.
Source: Gazettabyte
Thursday, March 8, 2012 at 9:29AM Feature: Beyond 100G - Part 3
Alcatel-Lucent has detailed its next-generation coherent ASIC that supports multiple modulation schemes and allow signals to scale to 400 Gigabit-per-second (Gbps).
The announcement follows Ciena's WaveLogic 3 coherent chipset that also trades capacity and reach by changing the modulation scheme.
"They [Ciena and Alcatel-Lucent] have set the bar for the rest of the industry," says Ron Kline, principal analyst for Ovum’s network infrastructure group.
"We will employ [the PSE] for all new solutions on 100 Gigabit"
Kevin Drury, Alcatel-Lucent
Friday, March 2, 2012 at 4:00PM Ciena has announced its latest coherent chipset that will be the foundation for its future optical transmission offerings. The chipset, dubbed WaveLogic 3, will extend the performance of its 100 Gigabit links while introducing transmission flexibility that will trade capacity with reach.
Feature: Beyond 100 Gigabit - Part 1
"We are going to be deployed, [with WaveLogic 3] running live traffic in many customers’ networks by the end of the year"
Michael Adams, Ciena
Thursday, March 1, 2012 at 9:39AM Briefing: PON
Part 1: Monolithic integrated transceivers
OneChip Photonics is moving to volume production of PON transceivers based on its photonic integrated circuit (PIC) design. The company believes that its transceivers can achieve a 20% price advantage.
"We will be able to sell [our integrated PON transceivers] at a 20% price differential when we reach high volumes"
Andy Weirich, OneChip Photonics
10G EPON, EPON, GPON, OLT, ONU, OneChip Photonics, PIC, XGPON, broadband access, optical transceivers in Feature Print Article Sunday, November 6, 2011 at 3:35PM Briefing: 100 Gigabit
Part 2: Interview
Gazettabyte spoke to John D'Ambrosia about 100 Gigabit technology
John D'Ambrosia, chair of the IEEE 100 Gig backplane and copper cabling task force
John D'Ambrosia laughs when he says he is the 'father of 100 Gig'.
He spent five years as chair of the IEEE 802.3ba group that created the 40 and 100 Gigabit Ethernet (GbE) standards. Now he is the chair of the IEEE task force looking at 100 Gig backplane and copper cabling. D'Ambrosia is also chair of the Ethernet Alliance and chief Ethernet evangelist in the CTO office of Dell's Force10 Networks.
“People are also starting to talk about moving data operations around the network based on where electricity is cheapest”
Tuesday, October 25, 2011 at 10:18AM Gazettabyte spoke with BT, Level 3 Communications and Verizon about their 100 Gigabit optical transmission plans and the challenges they see regarding the technology.
Briefing: 100 Gigabit
Part 1: Operators
Operators will use 100 Gigabit-per-second (Gbps) coherent technology for their next-generation core networks. For metro, operators favour coherent and have differing views regarding the alternative, 100Gbps direct-detection schemes. All the operators agree that the 100Gbps interfaces - line-side and client-side - must become cheaper before 100Gbps technology is more widely deployed.
"It is clear that you absolutely need 100 Gig in large parts of the network"
Steve Gringeri, Verizon
100G serial interface, 100Gbps, BT, CFP, CFP2, Level 3, Verizon, service providers in Feature Print Article Tuesday, June 28, 2011 at 7:49AM Briefing: Optical Interconnect
Part 2: High-performance computing
IBM has adopted optical interfaces for its latest POWER7-based high-end computer system. Gazettabyte spoke to IBM Fellow, Ed Seminaro, about high-performance computing and the need for optics to address bandwidth and latency requirements.
“At some point when you go a certain distance you have to go to an optical link”
Ed Seminaro, IBM Fellow
IBM has used parallel optics for its latest POWER7 computing systems, the Power 775. The optical interfaces are used to connect computing node drawers that make up the high-end computer. Each node comprises 32 POWER7 chips, with each chip hosting eight processor cores, each capable of running up to four separate programming tasks or threads.
Using optical engines, each node – a specialised computing card - has a total bandwidth of 224, 120 Gigabit-per-second (12x10Gbps) VCSEL-based transmitters and 224, 120Gbps receivers. The interfaces can interconnect up to 2,048 nodes, over half a million POWER7 cores, with a maximum network diameter of only three link hops.
IBM claims that with the development of the Power 775, it has demonstrated the superiority of optics over copper for high-end computing designs.
